
BH2226FV,BH2226F
Technical Note
3/9
www.rohm.com
2009.07 - Rev.B
2009 ROHM Co., Ltd. All rights reserved.
●Timing Chart
(Unless otherwise specified, VCC=3.0V, RL=OPEN, CL=0pF, Ta=25℃)
Parameter
Symbol
Limits
Unit
Conditions
MIN.
TYP.
MAX.
CLK L level time
tCLKL
50
-
ns
CLK H level time
tCLKH
50
-
ns
DI setup time
tsDI
20
-
ns
DI hold time
thDI
40
-
ns
Parallel input setup time
tsPI
20
-
ns
Parallel input hold time
thPI
40
-
ns
CSB setup time
tsCSB
50
-
ns
CSB hold time
thCSB
50
-
ns
CSB H level time
tCSBH
50
-
ns
D/A output settling time
tOUT
-
100
s
CL=50pF,RL=10k
Parallel output delay time
tpOUT
-
600
ns
CL=50pF,RL=10k
Serial output delay time
tsOUT
-
350
ns
CL=50pF,RL=10k
Fig.1